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power management 1 sc560 dual output low noise ldo linear regulator ? 2009 semtech corporation features input voltage range 2.5v to 5.5v output voltage ranges 1.2v to 5.0v (each ldo) maximum output current 300ma (both ldos) dropout at 200ma load 200mv max. quiescent supply current 100a (both ldos enabled) shutdown current 100na (typ) output noise < 50v rms (sc560a and fi xed output versions) psrr < -65db at 1khz (sc560a and fi xed output versions) over-temperature protection short-circuit protection under-voltage lockout power good monitor for output a (sc560c and fi xed output versions) independent enable/disable for ldob (sc560b and fi xed output versions) mlpq-ut8, 1.5mm x 1.5mm x 0.6mm package applications pdas and cellular phones gps devices palmtop computers and handheld instruments tft/lcd applications wireless handsets digital cordless phones and pcs phones personal communicators wireless lan ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? description the sc560 is a family of dual output, ultra-low dropout linear voltage regulators designed for use in battery powered wireless applications. the sc560a, sc560b, and sc560c provide adjustable output voltages that can be set using two external resistors. fixed output voltages are also available (see ordering information for available combinations). fixed output devices provide the power- good monitor, independent enable pins, and a bypass pin for low-noise operation all members of the sc560 family require an input voltage level between 2.5v and 5.5v. output voltages for the adjustable versions can vary between 1.2v and 5.0v. fixed output voltage options are also chosen from this range. the sc560a provides superior low-noise performance by using an external bypass capacitor connected to pin 7 to fi lter the bandgap reference. the sc560b uses pin 7 as a separate enable pin for the second regulator output so the two outputs can be controlled independently. the sc560c uses this pin to provide a pgood output to hold a processor in reset when the voltage on outa is not in regulation. all other versions provide all three functions with fi xed output voltages (no feedback pins are provided). the device also provides protection circuitry such as current limiting, under-voltage lockout, and thermal protection to prevent device failures. stability is maintained by using 1f capacitors on the output pins. the mlpq-ut8 package and 0402 ceramic capacitors minimize the required pcb area. c in 2.2 f outa outb vin enb en outb en outa gnd enb pgood byp vin sc560d c outa 1 f c outb 1 f c byp 22nf pgood typical application circuit april 1, 2009
sc560 2 pin confi guration marking information ordering information device package sc560xultrt (1)(2)(3) mlpq-ut8 1.51.5 sc560xevb (3) evaluation board notes: (1) available in tape and reel only. a reel contains 3,000 devices. (2) available in lead-free package only. device is weee and rohs compliant. (3) the device variant is denoted by the x. 1 2 3 4 5 6 7 8 top view 0n yw pinout and voltage options device pin options output voltage options part no. code pin 4 pin7 pin 8 v ldoa v ldob sc560a fba byp fbb adj adj 0a sc560b fba enb fbb adj adj 0b sc560c fba pgood fbb adj adj 0c sc560d enb byp pgood 2.8v 1.8v 0d sc560e enb byp pgood 2.85v 2.85v 0k sc560f enb byp pgood 2.5v 1.8v 0l sc560g enb byp pgood 2.8v 1.5v 0u sc560h enb byp pgood 3.3v 3.3v 0s sc560l enb byp pgood 3.3v 1.8v 0z mlpq-ut-8; 1.5x1.5, 8 lead ja = 157c/w 0n = part no. code see pinout and voltage options table for details yw = datecode
sc560 3 exceeding the above specifi cations may result in permanent damage to the devic e or device malfunction. operation outside of the parameters specifi ed in the electrical characteristics section is not recommended. notes: (1) tested according to jedec standard jesd22-a114-b. (2) calculated from package in still air, mounted to 3 x 4.5 (in), 4 layer fr4 pcb with thermal vias under the exposed pad per jesd51 standards. absolute maximum ratings vin (v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.5 en, enb (v) . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (v in + 0.3) pgood (v) . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (v in + 0.3) pin voltage all other pins (v) . . . . . . . . . -0.3 to (v in + 0.3) outa, outb short circuit duration . . . . . . . . con tinuous esd protection level (1) (kv) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 recommended operating conditions ambient temperature range (c) . . . . . . . . . -40 < t a < +85 v in (v) .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 < v in < 5.5 v outa , v outb (v) .... . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 < v out < 5.0 thermal information thermal resistance, junction to ambient (2) (c/w) . . . 157 maximum junction temperature (c) . . . . . . . . . . . . . . +150 storage temperature range (c) . . . . . . . . . . . . -65 to +150 peak ir reflow temperature (10s to 30s) (c) . . . . . . . +260 unless otherwise noted v in = 3.6v, c in = 2.2f, c outa = c outb = 1f, v en = v enb = v in , t a = -40 to +85c. typical values are at t a = 25c. all specifi cations apply to both ldos unless otherwise noted. parameter symbol conditions min typ max units input supply voltage range v in 2.5 5.5 v output voltage v outx v in > v outx + 0.3v 1.2 5.0 v output voltage accuracy v outx v in = 2.5v to 5.5v, i outx = 0 to 300ma, v in > voutx + 0.3v -3 3 % maximum output current i max 300 ma dropout voltage (1) v d i outx = 200ma, v outx = 2.5v to 5.0v 100 200 mv shutdown current i sd t a = 25c 0.1 1 a quiescent current i q i outa = i outb = 0ma, t a = 25c 100 a load regulation v load i outx = 1ma to i max 20 mv line regulation v line i outx = 1ma -6 6 mv feedback regulation voltage (2) v fb 0.985 1 1.015 v current limit i lim 350 850 ma electrical characteristics
sc560 4 parameter symbol conditions min typ max units noise (3) e n v in = 3.7v, i outx = 50ma , 10hz < f < 100khz, c byp = 22nf 50 v rms v in = 3.7v, i outx = 50ma , 10hz < f < 100khz 300 v rms power supply rejection ratio (3) psrr v in = 3.7v, i outx = 50ma, f = 1khz, c byp = 22nf 65 db v in = 3.7v, i outx = 50ma, f = 1khz 40 pgood delay (4) t delay 160 200 240 ms pgood threshold (4) v th-pgood percentage of nominal output, v outa falling 82 87 92 % start-up time t su from off to 87% v outx , i outx = 50ma, c byp = 22nf (2) 1ms power up delay between ldoa and ldob (5) t delay delay between v outa and v outb start-ups 128 s under voltage lockout v uvlo v in rising 2.15 2.25 2.35 v uvlo hysteresis v uvlo-hys 100 mv over temperature protection threshold t ot temperature rising 160 c over temperature hysteresis t ot-hys 20 c digital inputs logic input high threshold v ih v in = 5.5v 1.25 v logic input low threshold v il v in = 2.5v 0.4 v logic input high current i ih v in = 5.5v 1 a logic input low current i il v in = 5.5v 1 a digital outputs pgood output voltage low v ol i sink = 500a,v in =3.7v 7 20 mv electrical characteristics (continued) notes: (1) dropout voltage is defi ned as v in - v outx , when v outx is 100mv below the value of v outx at v in = v outx + 0.5v. (2) sc560a, sc560b and sc560c only (3) except sc560b and fi xed output versions (4) except sc560a and sc560b (5) sc560a and sc560c only
sc560 5 typical characteristics load regulation ldoa 0 1 2 3 4 5 6 0 50 100 150 200 250 output current (ma) output voltage variation (mv) v outa = 3.3v, v in = 3.6v t a =85 c t a =25 c t a =-40 c line regulation ldoa -0.5 0 0.5 1 1.5 2 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 input voltage (v) output voltage variation (mv) v outa = 3.3v, i outa = 1ma t a =85 c t a =25 c t a =-40 c line regulation ldob -0.5 0 0.5 1 1.5 2 2.5 3 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 input voltage (v) output voltage variation (mv) v outb = 2.8v, i outb = 1ma t a =25 c t a =-40 c t a =85 c dropout voltage ldob 0 50 100 150 200 250 300 350 400 2.5 2.55 2.6 2.65 2.7 2.75 2.8 2.85 2.9 2.95 3 3.05 3.1 input voltage (v) vin - vout (mv) v outb = 2.8v, i outb = 200ma t a =85 c t a =25 c t a =-40 c dropout voltage ldoa 0 50 100 150 200 250 300 2.95 3 3.05 3.1 3.15 3.2 3.25 3.3 3.35 3.4 3.45 3.5 3.55 3.6 input voltage (v) vin - vout (mv) v outa = 3.3v, i outa = 200ma t a =85 c t a =-40 c t a =25 c load regulation ldob 0 1 2 3 4 5 6 7 8 0 50 100 150 200 250 output current (ma) output voltage variation (mv) v outb = 2.8v, v in = 3.6v t a =85 c t a =25 c t a =-40 c
sc560 6 typical characteristics (continued) psrr vs. frequency (both ldos) -70 -60 -50 -40 -30 -20 -10 0 10 100 1000 10000 frequency (hz) psrr (db) v out = 2.8v, i o = 50ma, no c byp output noise vs. load current (both ldos) 0 10 20 30 40 50 60 70 80 0 50 100 150 200 250 output current (ma) output voltage noise ( v) t=85 c t=25 c t=-40 c v out = 2.8v, v in =3.7v, c byp =22nf psrr vs. frequency (both ldos) -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 100 1000 10000 frequency (hz) psrr (db) v out = 2.8v, i o =50ma, c byp =22nf output noise vs. load current (both ldos) 0 50 100 150 200 250 300 350 400 450 0 50 100 150 200 250 output current (ma) v out = 2.8v, v in = 3.7v, no c byp t a =85 c t a =25 c t a =-40 c output voltage noise ( v) load transient response rising edge (both ldos) v in = 3.6v, v out = 2.8v i out =10ma to 200ma (100ma/div) v out (10mv/div) load transient response falling edge (both ldos) v in = 3.6v, v out = 2.8v i out =10ma to 200ma (100ma/div)) v out (10mv/div)
sc560 7 pin confi gurations and descriptions pin # pin name pin function sc560a sc560b sc560c sc560 fixed output 1 1 1 1 outb output for ldob 2 2 2 2 vin input supply voltage terminal 3 3 3 3 outa output for ldoa 444 fba feedback sense pin for ldoa connect this pin to an external resistor divider to set v outa 5 5 5 5 gnd analog and digital ground 666 6 en logic input active high enables both ldos for the sc560a and sc560c, or ldoa for all other variants. en must be active in the sc560b and the fi xed output variants before enb can be activated. 7 7 byp ldo bypass output bypass with a 22nf capacitor 7 4 enb logic input active high enables ldob for sc560b and the fi xed voltage variants. 7 8 pgood power good output monitors the level of ldoa, switches low when the output drops out of regulation. 888 fbb feedback sense pin for ldob connect this pin to an external resistor divider to set v outb
sc560 8 block diagrams vref uvlo o/t power- on logic ldob ldoa 1 2 3 6 5 8 7 4 en gnd vin enb outa outb fbb fba sc560b vin vin vin vref uvlo o/t power- on logic ldob ldoa 1 2 3 6 5 8 7 4 en gnd vin byp outa outb fbb vin vin vin fba sc560a
sc560 9 block diagrams (continued) vref uvlo o/t power- on logic ldob ldoa 1 2 3 6 5 7 8 4 en gnd vin pgood outa outb byp enb sc560 ? fixed output versions pgood logic vin vin vin vref uvlo o/t power- on logic ldob ldoa 1 2 3 6 5 8 7 4 en gnd vin pgood outa outb fbb fba sc560c pgood logic vin vin vin
sc560 10 general description the sc560 is a family of dual output linear regulator devices intended for applications where low dropout voltage, low supply current, and low output noise are critical. each device provides a very simple, low cost solution for two separate regulated outputs. very little pcb area is required due to the miniature package size and the need for only four external capacitors. the linear regulators ldoa and ldob are powered from a single input supply rail, and each provides 300ma of output current. the sc560 can provide output voltages in the range 1.2v to 5.0v. the output voltages for the sc560a, sc560b and sc560c are set by connecting external resistor dividers to the feedback pins of each ldo. all other versions of the sc560 have fi xed output voltage values shown in the pinout and voltage options table on page 2. power on control the sc560a and sc560c devices have a single enable pin (en) that controls both ldo outputs. pulling this pin low causes the device to enter a low power shutdown mode where it typically draws 100na from the input supply. when en transitions high, the output of ldoa is enabled. after a delay of 128s, the output of ldob is enabled. in the sc560c, when the output voltage of ldoa reaches 87% of its regulation point, the delay timer starts and the pgood signal transitions high after a delay of 200ms. the power up/down sequence is shown in the timing diagram in figure 1. outa pgood en outb 87% 87% 200ms 128 s figure 1 timing diagram the sc560b and the fi xed output variants provide a separate enable pin for ldob which allows ldoa and ldob to be enabled independently. the en pin controls the ldoa output and the enb provides the same functionality relative to the ldob output. the table shown below lists the eff ect of the polarity of the en and enb signals on the outputs of ldoa and ldob. note from the table that ldob can only be enabled when ldoa is already active. since ldob can be enabled separately, there is no timing relationship between the two outputs at startup. en enb ldoa ldob low low off off low high off off high low on off high high on on the sc560c and the fi xed output variants have a pgood signal which monitors the output of ldoa and transitions high 200ms after ldoa has reached 87% of its regulation point. this can be used to hold a processor in reset when the output voltage is out of regulation. note that when ldoa drops out of regulation and pgood is forced low, ldob is also disabled until pgood is reset. output voltage selection the output voltage of each ldo for the sc560a, sc560b, and sc560c version is set independently using external resistor dividers. figure 2 illustrates the proper connection for ldoa. outa fba r 1 r 2 figure 2 output voltage feedback circuit applications information
sc560 11 applications information (continued) the values of the resistors in the voltage divider network can be calculated using the equation: 2 2 1 ref out r r r v v where v ref = 1v. the value of r2 should be 100k or less to ensure noise performance and stability. values signi cantly less than 100k will impact the quiescent current. protection features the sc560 family provides the following protection features to ensure that no damage is incurred in the event of a fault condition: under-voltage lockout over-temperature protection short-circuit protection under-voltage lockout the under-voltage lockout (uvlo) circuit protects the device from operating in an unknown state if the input voltage supply is too low. when the v in drops below the uvlo threshold, the ldos are disabled and pgood is held low (sc560c and fi xed output variants only). when v in is increased above the hysteresis level, the ldos are re-enabled into their previous states, provided en has remained high. when powering up with v in below the uvlo threshold, the ldos remain disabled and pgood is held low (sc560c and fi xed output variants only). over-temperature protection an internal over-temperature (ot) protection circuit is provided that monitors the internal junction temperature. when the temperature exceeds the ot threshold as defi ned in the electrical characteristics section, the ot protection disables both ldo outputs and holds the pgood signal low. when the junction temperature drops below the hysteresis level, the ldos are re-enabled into their previous states and pgood transitions high after a 200ms delay, provided en has remained high (sc560c and fi xed output variants only). ? ? ? short-circuit protection each output has short-circuit protection. if the output current exceeds the current limit, the output voltage will drop and the output current will be limited until the load current returns to a specifi ed level. if a short-circuit occurs on the output of ldoa, the output of ldob will also be disabled until the fault is removed and the load current returns to a specifi ed level. component selection a capacitance of 1f or larger on each output is recommended to ensure stability. ceramic capacitors of type x5r or x7r should be used because of their low esr and stable temperature coeffi cients. it is also recommended that the input be bypassed with a 2.2f, low esr x5r or x7r capacitor to minimize noise and improve transient response. note: tantalum and y5v capacitors are not recommended. the byp pin on the sc560d and the fi xed output versions must have a minimum of 22nf connected to ground to meet all noise-sensitive requirements. increasing the capacitance to 100nf will further improve psrr and output noise.
sc560 12 thermal considerations although each of the two ldos in the sc560 can provide 300ma of output current, the maximum power dissipation in the device is restricted by the miniature package size. the graphs in figure 3 and figure 4 can be used as a guideline to determine whether the input voltage, output voltages, output currents, and ambient temperature of the system result in power dissipation within the operating limits are met or if further thermal relief is required. 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 2.5 3 3.5 4 4.5 5 5.5 6 ______ t a =+25 c, p d(max) = 0.8w - - - - t a =+85 c, p d(max) = 0.41w vo=3.3v input voltage (v) maximum total output current (a) maximum recommended input voltage vo=1.5v figure 3 safe operating limit 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 -40 -20 0 20 40 60 80 100 maximum power dissipation (w) ambient temperature ( o c) t j (max)=150 c t j (max)=125 c figure 4 maximum p d vs. t a applications information (continued) the following procedure can be followed to determine if the thermal design of the system is adequate. the junction temperature of the sc560 can be determined in known operating conditions using the following equation: t j = t a +(p d x ja ) where t j = junction temperature (c) t a = ambient temperature (c) p d = power dissipation (w) ja = thermal resistance junction to ambient (c/w) example an sc560d is used to provide outputs of 2.8v, 150ma from ldoa and 1.8v, 200ma from ldob. the input voltage is 4.2v, and the ambient temperature of the system is 40c. p d = 0.15(4.2 C 2.8) + 0.2(4.2 C 1.8) = 0.69w and t j = 40 + (0.69 x 157) = 148.3c figures 3 and 4 show that the junction temperature would be within the maximum specifi cation of 150c for this power dissipation. this means that operation of the sc560 under these conditions is within the specifi ed limits and the device would not require further thermal relief measures.
sc560 13 layout considerations while layout for linear devices is generally not as critical as for a switching application, careful attention to detail will ensure reliable operation. the diagram below illustrates proper layout of a circuit using the sc560a. for variants that dont require current setting resistors, these devices can be omitted from the layout. attach the part to a large copper footprint, to enable better heat transfer from the device on pcbs where there are internal power and ground planes. ? applications information (continued) place the input, output, and bypass capacitors close to the device for optimal transient response and device behavior. connect all ground connections directly to the ground plane whenever possible to minimize ground potential diff erences on the pcb. ensure that the feedback resistors are placed as close as possible to the feedback pins. ? ? ? r1 r2 r3 r4 c4 c3 c2 c1 1 u1 u1 = sc560a
sc560 14 .059 bsc 1.50 bsc notes: .004 8 .000 .018 - - (.006) 0.10 8 .024 .002 0.00 0.45 0.05 0.60 (0.1524) - - .004 0.10 1.50 bsc 0.40 bsc .016 bsc .014 0.35 .059 bsc coplanarity applies to the exposed pad as well as the terminals. 2. controlling dimensions are in millimeters (angles in degrees). 1. inches dimensions nom e bbb aaa a1 a2 dim n l e min d a millimeters max min max nom pin 1 indicator (laser mark) b .006 .008 .010 0.15 0.20 0.25 d a e b a1 aaa c a2 c seating plane e bxn lxn bbb c a b 1 2 n 0.20 0.25 0.17 0.40 0.30 0.16 0.12 a outline drawing mlpq-ut8
semtech corporation power management products division 200 flynn road, camarillo, ca 93012 phone: (805) 498-2111 fax: (805) 498-3804 www.semtech.com contact information sc560 15 land pattern mlpq-ut8 inches dimensions p z x y c g dim millimeters r .004 0.10 1. controlling dimensions are in millimeters (angles in degrees). y x g z (g) (z) 2x (c) r p .030 .087 (.057) .028 0.75 2.20 (1.45) 0.70 0.20 0.40 .016 .008 this land pattern is for reference purposes only. consult your manufacturing group to ensure your company's manufacturing guidelines are met. notes: 2.

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